AR. Architecture (33 core hours)

AR1. Digital logic and digital systems (core -- 3 hours)

  Simple building blocks (logic gates, flip-flops, counters, registers)
  Logic expressions
  Simple adders, structure of a simple arithmetic-logic unit (ALU)

AR2. Machine level representation of data (core -- 3 hours)

  Numeric data representation and number bases
  Fixed- and floating-point systems
  Signed and twos-complement representations
  Representation of nonnumeric data

AR3. Assembly level machine organization (core -- 9 hours)

  Basic organization
  Control unit; instruction fetch, decode, and execution
  Instruction sets and types (data manipulation, control, I/O)
  Assembly/machine language programming
  Instruction formats
  Addressing modes
  I/O and interrupts

AR4. Memory system organization (core -- 5 hours)

  Storage systems and technology
  Memory hierarchy
  Main memory organization and operations
  Latency, cycle time, bandwidth, and interleaving
  Cache memories (address mapping, replacement and store policy)

AR5. I/O and communication (core -- 3 hours)

  Input/output control methods, interrupts
  Synchronization, open loop, handshaking
  External storage, physical organization, and drives
  Bus systems, control, direct-memory access (DMA)

AR6. CPU implementation (core -- 10 hours)

  Hardwired realization of CPU
  Microprogrammed realization; formats and coding
  Varieties of instruction formats
  Architectural support for operating systems and compilers
  Instruction pipelining
  Introduction to instruction-level parallelism (ILP)